1. Field of the Invention
This invention relates generally to integrated circuits and, more particularly, to a voltage-dependent delay for use in an integrated circuit.
2. Description of the Related Art
Microprocessor-controlled circuits are used in a wide variety of applications. Such applications include personal computers, control systems, telephone networks, and a host of consumer products. As is well known, microprocessors are essentially generic devices that perform specific functions under the control of a software program. This program is stored in a memory device coupled to the microprocessor. Not only does the microprocessor access a memory device to retrieve the program instructions, it also stores and retrieves data created during execution of the program in one or more memory devices.
There are a wide variety of different memory devices available for use in microprocessor-based systems. The type of memory device chosen for a specific function within a microprocessor-based system depends largely upon what features of the memory are best suited to perform the particular function. One common type of memory device is known as a random access memory (RAM). As the name implies, any memory location in a RAM may be accessed individually to store information or to read information. As a further advantage, the memory cells used in most RAMs are capable of handling millions of write, read, and erase cycles, commonly referred to as programming cycles, without failure.
Traditionally, RAMs, such as dynamic RAMs (DRAM) and static RAMs (SRAM), were asynchronous devices. In other words, unlike synchronous devices, such as microprocessors, which perform operations in synchronism with a system clock, traditional asynchronous RAMs perform operations in a sequential manner independent of the frequency at which the associated microprocessor operates. Thus, in a conventional microprocessor-based system, the microprocessor initiates a read cycle or a write cycle with the associated RAM, and the RAM performs the requested operation in an asynchronous manner.
Recently, new microprocessor technology has pushed the operating rates of microprocessors to 200 MHz and beyond. Such fast microprocessors are typically used in general purpose computer systems, such as personal computers and networkable computers, although other applications do exist. At such elevated operating rates, traditional asynchronous memory devices may operate in a less than efficient manner. Accordingly, synchronous memory devices, such as synchronous DRAMs (SDRAM) and synchronous SRAMs (SSRAM), have been developed. Unlike conventional asynchronous memory devices, synchronous RAMs typically operate off of the same system clock used by the microprocessor. Thus, in synchronized systems of this type, the microprocessor is better able to coordinate read and write cycles with the associated memory devices than in systems which use asynchronous memory devices.
While SDRAMs attempt to optimize the data output path to minimize access times, the access time may be variable. For instance, variations in the supply voltage applied to the SDRAM may affect the access time. Specifically, the access time is typically the slowest at low supply voltages and typically the fastest at higher supply voltages. Although faster access times are generally desirable, it should be understood that SDRAMs must hold the output data for a certain time after the next system clock cycle. At high supply voltages, this output data hold time may not be met or it may be marginal. In a situation such as this, it is possible that data from the next data output cycle will overwrite the previous data and, thus, create an error condition.
The present invention may address one or more of the problems set forth above.